1. Field of the Invention
The invention relates to a semiconductor memory device and more particularly, to a redundancy region of a NAND type flash memory.
2. Description of the Related Art
A NAND type flash memory comprises a memory consisting of a plurality of blocks, each of which comprises a plurality of NAND strings arranged in a row direction. The NAND string comprises a plurality of memory cells connected in serial and select transistors provided at two ends of the NAND string. One end of the NAND string is connected to a bit line through one of the select transistors, and the other end of the NAND string is connected to a source line through the other one of the select transistors. Reading-out and writing-in (programming) of data are performed through the bit line connected to the NAND string.
As for semiconductor memories, such as a flash memory, a dynamic random access memory, and so on, since integration has continually increased, the difficulty in manufacturing memory elements without failures or defects has consequently risen. Accordingly, to compensate for physical defects in memory elements during the manufacturing process, redundancy schemes are used in memory chips. For example, some redundancy schemes comprise a convert circuit and a redundant memory region. The convert circuit converts addresses of memory elements having physical defects into addresses of memory elements of the redundant memory region, and the redundant memory region is used to compensate for the memory elements having physical defects. When a memory chip is tested or ready for shipment, address information of the memory elements having physical defects and the memory elements of the redundant memory region is stored in a fuse ROM or a storage element, such as a register. After that, when an address of a defective memory element is input, the address is detected, and the access to the defective memory element is forbidden and a corresponding memory element of the redundant memory region is accessed instead. Therefore, appearance-wise, a memory device with a defective memory element therein, will not be noticeable (for example, Patent Document 1 and 2). In summary, though defects may exist in a small number of memory elements, the memory chip may still be deemed as a qualified product because of the redundancy scheme. Therefore, yield rates would not necessarily drop and memory device costs would not necessarily rise.